Various technologies are competing for prominence in the evolution of HD cameras, each showcasing its unique strengths. Among these, HD-SDI technology—based on uncompressed digital signals—retains the distinctive features of traditional analog cameras while seamlessly integrating with IP-based HD systems, making it a key direction for future HD advancements. With the promising growth prospects of HD-CCTV, Fuhomicro has taken the lead by introducing an HD-SDI board solution. HD images deliver image quality that is at least three times sharper than D1 resolution, and the exceptional encoding performance of Fuhomicro’s FH8735 ensures efficient compression and reliable storage of pristine HD-SDI footage. Additionally, the choice between PCI and PCI-E bus interfaces offers flexibility depending on specific application requirements. For scenarios demanding high-resolution previews, the superior bandwidth of PCI-E guarantees smooth transmission of raw HD video streams to the HOST system for advanced post-processing. Clearly, HD technology not only enhances visibility, enabling clearer identification of targets in surveillance scenes and ensuring more accurate evidence collection—but, more importantly, it provides a robust foundation for capturing high-quality, unaltered source footage. This, in turn, significantly simplifies and improves the accuracy of intelligent video analytics and content recognition tasks.This article examines the evolution of SoC chips in video surveillance, delves into HD-SDI chip solutions and the criteria for selecting them, explores the practical applications of HD-SDI in surveillance systems, compares HD-SDI HD cameras with their network-based counterparts, and discusses the current challenges as well as future development paths for HD-SDI chips.
Currently, standard-definition (SD) remains the dominant product on the market, and SD and high-definition (HD) will likely coexist for a long time to come. Techwell has taken steps to upgrade its SD chips in two key areas: First, enhancing resolution—specifically, upgrading from D1 to support the 960H format. For instance, the TW2809 successfully achieved this transition, enabling users to enjoy near-HD-quality video experiences through solutions like the front-end TV decoding chip combination TW2960 + TW2809. Second, integrating a front-end TV decoder directly into existing codec chips—for example, the newly launched TW5866 builds upon the TW5864 by incorporating an 8-channel TV decoder, which not only boosts system stability but also helps reduce overall product costs. Meanwhile, several other chip manufacturers are placing significant emphasis on maintaining platform compatibility while fully unlocking the potential of their legacy products. Take TI as an example: In IP network camera applications, although the DM365 is already widely adopted, TI has further evolved this chip into a single-chip system featuring an integrated ARM9 video co-processor along with a built-in ISP. This enhanced architecture allows the chip to support resolutions ranging from D1 up to 720P—though at slightly different clock speeds—while ensuring complete pin and software compatibility. This same level of backward compatibility extends seamlessly to the DM368, which can now handle 1080P resolution at 30 fps.
On this fully compatible platform, there are two smart camera platforms—DMVA1 and DMVA2—where the former supports standard-definition resolution, while the latter is designed for high-definition. Looking ahead, the future 1080P@60fps HD platform will maintain the same architectural design, with only minor upgrades: the ARM processor will be upgraded to the A8, the video co-processor will receive an enhancement, and the ISP performance will be further improved. Additionally, TI has introduced the DMVA3 smart camera platform, which also supports 1080P resolution, while continuing to leverage the existing application software. Notably, TI’s IP network camera solutions fully support both ONVIF and PSIA protocols.
Various technologies are vying for prominence in the evolution of HD cameras, each showcasing its unique strengths. Among them, HD-SDI technology—based on uncompressed digital signals—retains the distinctive features of traditional analog cameras while seamlessly integrating with IP-based HD systems, making it a key direction for future HD advancements. With the promising growth prospects of HD-CCTV, Fuhomicro has taken the lead by introducing an HD-SDI board solution. HD images deliver image quality that is at least three times sharper than D1 resolution, and the exceptional encoding performance of Fuhomicro’s FH8735 ensures efficient compression and reliable storage of pristine HD-SDI footage. Additionally, the choice between PCI and PCI-E bus interfaces allows flexibility based on specific application needs. For scenarios requiring high-resolution previews, the superior bandwidth of PCI-E guarantees smooth transmission of raw HD video streams to the HOST system for advanced post-processing. Clearly, HD technology not only enhances visibility, enabling clearer identification of targets in surveillance scenes and ensuring more accurate evidence collection—but most importantly, it provides a robust foundation for capturing high-quality, unaltered source footage. This, in turn, significantly simplifies and improves the accuracy of intelligent video analytics and content recognition tasks. This article explores the evolution of SoC chips in video surveillance, delves into HD-SDI chip solutions and selection criteria, examines the practical applications of HD-SDI in surveillance systems, compares HD-SDI HD cameras with their network counterparts, and discusses current challenges and future development paths for HD-SDI chips.
The Development of SoC Chips in Video Surveillance
In the security market, audio and video codec chips—upstream industry products—have long been the subject of a competitive battle among DSPs, ASICs, and SoCs. However, over the past couple of years, thanks to advancements in microelectronics technology and continuous improvements in SoC chip processing capabilities, SoCs have rapidly gained momentum. Offering significant advantages such as low cost, low power consumption, and high integration, SoCs now boast superior processing power and faster computation speeds, positioning them as formidable contenders poised to dominate the codec chip market. The emergence of SoC chips effectively combines the best features of both DSPs and ASICs while addressing their respective limitations. As a result, the industry has placed even greater expectations on SoCs, which not only inherit ASIC’s specialized performance traits—delivering high efficiency, affordability, and energy savings—but also retain the flexibility characteristic of DSPs, all while overcoming the higher cost challenges traditionally associated with DSP-based solutions.
In addition to the basic requirements for decoding compatibility and encoding compression quality, a high-speed system architecture, memory bandwidth, highly efficient DMA controllers, and even multi-core parallel processing are all critical indicators for evaluating whether an SoC delivers outstanding performance.
A System-on-Chip (SoC) is a single-chip integrated system featuring multiple processor cores. It incorporates a main CPU, with the integrated cores ranging from hard-core ASIC designs to soft-core DSP or coprocessor architectures—and may even include other specialized processing subsystems—alongside a rich array of peripheral devices. As an application-specific on-chip system, SoCs leverage technologies like hardware acceleration to efficiently execute the highly complex algorithms required for H.264 encoding, enabling targeted optimizations for video compression tasks and delivering superior performance. With the rapid growth of digital video applications in the security market—where advanced video processing plays a critical role—SoCs are rapidly gaining prominence, injecting fresh momentum into the video surveillance industry.
Currently, many semiconductor solution providers are shifting toward SoC architectures, including established European and American giants such as TI, NXP, ADI, and Techwell. Additionally, in recent years, a new wave of promising SoC innovators has rapidly emerged in mainland China and Taiwan—companies like HiSilicon, VeriSilicon, Shengmai, and Enjie. In terms of applications, SoCs have gained widespread recognition across industries such as video security surveillance, video conferencing, high-definition gaming, remote data center management, distance learning, and telemedicine.
In fact, a SoC is not simply a single chip—it’s a complete solution. TI’s LMH0394 delivers the industry’s longest reach, supporting up to 200 meters of HD video (or 400 meters in standard definition), with data rates as high as 3Gbps and featuring a remarkably low power consumption of just 115mW on average. Encoding and decoding SDI video signals demands a robust processor, and the DM81xx platform is well-equipped to handle such multi-channel HD systems. Similarly, addressing the growing demand for HD-SDI, Techwell has introduced its HD-SDIPCDVR broadcast-grade HD product powered by the TW2809, which supports resolutions like 720P, 1080i, and 1080P.
Domestically, HiSilicon offers a comprehensive HD solution ranging from the Hi3512 and Hi3515 to the Hi3516. Taking the Hi3512 as an example, this solution features a high-performance communication media processor powered by an ARM9 processor core and equipped with a video hardware acceleration engine. It boasts high integration, programmability, and supports multiple protocols such as H.264 and MJPEG. Notably, its video processing unit can handle encoding and decoding for various standards, including H.264 MainProfile, Baseline Profile, and MJPEG/JPEG formats. Additionally, it supports 1.3-megapixel video at 30 fps and enables JPEG snapshot capture of up to 3 million pixels. The video processing unit also supports advanced features like dual-stream encoding. With its rich array of peripheral interfaces, the Hi3512 solution easily meets diverse device specifications while effectively reducing the overall bill-of-materials (BOM) cost of the final product.
For instance, TI’s DM8168 boasts impressive H.264 digital video encoding capabilities, supporting up to three 1080P@60fps high-definition streams simultaneously. It also seamlessly handles video compression formats such as MPEG4, MPEG2, and VC1, while further extending its versatility by enabling compliance with SVAC, China’s own independently developed intellectual property standard. Beyond that, the DM8168 can effortlessly achieve encoding tasks like six-channel 1080P@30fps or 720P@60fps, twelve-channel 720P@30fps, or even thirty-channel D1 encoding—all on a single chip. This makes it an ideal choice for developing multi-channel DVRs, DVS systems, and NVR solutions alike, all of which are fully equipped to support high-definition video surveillance applications. Moreover, the DM8168 integrates a robust ARMCortex-A8 main processor capable of clock speeds up to 1GHz, serving as the core processing unit for these devices. It effortlessly runs advanced, real-time operating systems and supports cutting-edge connectivity options, including Gigabit Ethernet, SATA hard-drive interfaces, and PCIe high-speed bus ports. Thanks to its highly efficient, high-performance video processing subsystem, the DM8168 delivers exceptional features such as de-interlacing, image enhancement, and noise reduction—alongside the ability to manage three independent graphical layers, enable linear scaling, and provide three distinct HD or SD OSD overlays. Additionally, with its built-in 3D graphics accelerator, the DM8168 elevates the user experience by enabling immersive, three-dimensional menu interfaces, fundamentally transforming the visual appeal and functionality of digital video surveillance products.
To meet the demands of varying network bandwidths and display devices, earlier IP surveillance systems often employed multi-stream simultaneous encoding, which naturally increased data throughput. H.264 SVC (Scalable Video Coding) offers an effective solution to this challenge. By leveraging scalable coding, the encoder only needs to generate a single stream, allowing users to select the desired level—such as resolution or frame rate—for transmission, storage, and decoding. This approach not only saves bandwidth and storage resources but also ensures efficient use of existing non-HD displays.
Clearly, high definition alone is far from sufficient—high-definition codec chips now require a more advanced SoC integration to enhance capabilities such as de-interlacing, 3D noise reduction, and video enhancement, along with intelligent recognition features, all essential for meeting the functional demands of DVRs and NVRs. In other words, the key focus should be on boosting surveillance efficiency through smart monitoring. Smart monitoring algorithms can significantly improve the effectiveness of HD-based surveillance systems. As the number of surveillance cameras continues to grow and financial crime tactics become increasingly diverse, intelligent monitoring has become an absolute necessity. Moving forward, smart solutions must prioritize business-driven visual management, with future advancements in AI algorithms further enhancing the reliability of content analysis—evolving from mere surveillance aids to powerful enablers of transformative business processes. Moreover, this trend will pave the way for more value-added applications in digital video surveillance, such as intelligent image recognition, real-time video analytics, license plate detection, facial recognition, and anomaly behavior detection. To meet the growing demand for intelligent digital video surveillance, a versatile, high-performance, programmable processor emerges as the ideal platform. Texas Instruments' DSPs have already been widely adopted by developers, enabling the creation of embedded intelligent analysis systems. The DM8168 platform, for instance, integrates a C674x-core DSP capable of operating at up to 1 GHz, with all available resources fully dedicated to supporting advanced, value-added functionalities—including cutting-edge smart video analytics.
One of the key objectives behind the development of cloud-architecture-based electronic systems is to simplify circuit design to the greatest extent possible, ensuring that the overall product system meets stringent quality standards such as reliability, precision, and stability. However, the newly emerging SoC chips are still some way off from fully achieving this goal. From a hardware perspective, the increasing integration of multiple CPU cores required for advanced SoC designs demands sophisticated coordination, extensive DMA operations, and efficient management of massive memory data—tasks that, while enabling superior multi-channel encoding/decoding performance, also introduce greater complexity and technical challenges into the codec chip itself, inevitably leading to stability issues. Meanwhile, from a software standpoint, the underlying drivers and SDKs must provide an expanded array of interfaces to seamlessly support the needs of higher-level AP applications. Ultimately, the success of a chip depends not only on the stable performance of its hardware components but also on the robustness of its accompanying drivers and SDKs.
Looking ahead to the development of the security market, comprehensive system integration will remain the key direction for future growth. For chips, a single-chip solution for all systems will inevitably become the way forward, and system architectures will also move toward greater consistency. Video encoding and decoding will increasingly rely on a hybrid approach that combines hardware and software, ensuring compatibility with the latest video compression and processing technologies required by evolving formats. Meanwhile, the performance and functionality of various display, transmission, and interaction interfaces will continue to be highly integrated and enhanced. As a result, much of the upcoming development in digital video surveillance systems will focus on advancing software-based system design. From the perspective of encoding/decoding chips, chips capable of handling ultra-high-definition, multi-channel encoding and decoding will be the future trend—while integrating front-end and back-end modules into these chips is also emerging as a major area of innovation.
HD-SDI Chip Solutions and Selection
What HD-SDI Means
SDI (Serial Digital Interface) stands for "Digital Component Serial Interface," and HD-SDI refers to the High-Definition Digital Component Serial Interface. HD-SDI chip-based cameras are real-time, uncompressed HD broadcast-grade camcorders, representing another significant technological advancement in the field of security surveillance. They provide monitoring centers with exceptionally clear, high-quality image sources. In reality, while features like crystal-clear picture quality, zero latency, easy control, and convenient remote storage management may sound straightforward, achieving true HD performance turns out to be quite challenging. Whether or not the HD footage is compressed, the ability of non-networked image signals to travel quickly, instantly, and over long distances poses an extremely demanding test for security surveillance systems. That’s why we often say the real challenge of HD lies in transmission—and the farther the signal needs to travel, the more critical and risky it becomes. As we’re familiar with, the SDI standard itself wasn’t originally developed specifically for imaging applications; rather, it emerged as a versatile transmission technology focused on the efficient exchange of signals between transmitting (Tx) and receiving (Rx) devices.
HD-SDI Chip Transmission and Reception Solutions
The SDI functionality is composed of various components; in the security R&D community, SDI chip solutions—including even FPGAs—had largely taken shape as early as 2007. Back then, at the NAB 2007 exhibition in the U.S., several chip manufacturers unveiled a range of innovative solutions tailored for 3G-SDI (the third-generation Serial Digital Interface). These companies included Gennum (now part of Semtech), National Semiconductor (NS, now merged into Texas Instruments), Altera, and Xilinx. Notably, Gennum later gained prominence in the security industry with its GV7600/GV7601 chips. Beyond being a key driver behind HDcctv systems, Gennum also pioneered the integration of discrete Tx and Rx chip architectures into a single, unified solution. For instance, their transmitter (Tx) chip combines serializers with cable drivers, while the receiver (Rx) chip integrates deserializers alongside cable equalizers—techniques that significantly streamline both camera and DVR designs.
Currently, HD-SDI is primarily used at the transmitting end in front-end acquisition devices such as cameras. After the camera's CCD or CMOS image sensor captures the signal, uncompressed high-definition video can be transmitted either via analog or digital methods. Analog transmission typically employs YPbPr component signals, requiring three coaxial cables to carry a single HD video stream simultaneously. Digital transmission, on the other hand, commonly uses DVI, HDMI, or HD-SDI interfaces. However, DVI and HDMI are limited to short distances—usually just a few meters—and even with repeater amplifiers, their maximum range rarely exceeds tens of meters. This makes them unsuitable for long-distance transmission of surveillance footage, though they’re often used for connecting equipment and transferring signals within broadcast control rooms. In contrast, HD-SDI signals can reliably transmit over distances of up to 100 meters, making it ideal for use with standard CVBS coaxial cables and BNC connectors. As a result, HD-SDI is frequently employed for linking field-based capture devices with nearby control equipment located within approximately 100 meters. Meanwhile, several domestic security manufacturers have already introduced their own SDI-interface HD cameras capable of delivering 1080P25 high-definition video output. A block diagram illustrating the HD-SDI transmitter implementation is also available.
The image sensor in a camera acts as the "eye," primarily responsible for converting optical images into electronic image signals. However, in practical applications, CCD image sensors fall significantly short when it comes to meeting the demands of high-speed, high-definition data acquisition. In contrast, CMOS image sensors do not suffer from CCD's "bottleneck" issues—they can process vast amounts of data in record time, delivering crystal-clear, high-definition footage while also easily supporting HDV standards. Moreover, CMOS technology outperforms CCD in terms of cost efficiency and lower power consumption, allowing it to be integrated seamlessly with video-processing circuits on a single chip. Additionally, unlike CCD imaging, which requires an AFE (Analog Front End) analog-to-digital converter to digitize the CCD image signal and generate precise timing control signals, CMOS-based imaging devices can directly output digital signals—eliminating the need for an AFE altogether. For this reason, CMOS image sensors are better suited for HD-SDI cameras. Looking at today’s market trends, with continuous advancements in optoelectronic imaging technology, CMOS image sensors are increasingly poised to completely replace CCD sensors—not only in professional settings but also in consumer-grade photography and videography equipment.
The CPU, as the core component of the entire HD camera system, functions as both the brain and the heart of the device. The HD-SDI HD camera outputs raw digital signals—uncompressed and unencoded—via an HDMI or HD-SDI port. Overall, the CPU not only handles image processing and encoding but also manages system control and performs critical computations, effectively serving as the central processor for the entire camera system.
Currently, "high-definition video and audio" are gaining significant traction in the security industry. When it comes to front-end cameras, an increasing number of manufacturers are opting for products that offer high pixel density and wide dynamic range—features that inevitably lead to ever-growing data volumes. This, in turn, demands more powerful CPU processing capabilities, especially for handling parallel data streams. As a result, video cameras equipped with DSPs/ASICs/ASSPs often find themselves "willing but unable" to meet these advanced requirements. Fortunately, FPGAs, with their inherent parallelism and programmability, perfectly enable manufacturers to deliver diverse performance levels tailored to market needs. Among all the low-cost FPGA series available today, the Cyclone III devices stand out as the best choice for video-processing applications like HD-SDI cameras, thanks to their exceptional storage-to-logic and DSP-to-logic ratios.
The signal output interface includes circuits such as the seralizer (Seralizer) and the cable driver (CableDriver). The seralizer, also known as the transmitter (Transmitter), primarily converts the 10-bit or 20-bit video data output by the CPU into a standard SDI signal, following the encoding standards specified by SMPTE. To extend the transmission distance, a cable driver is typically added; however, it’s not always necessary if the desired range can be achieved without one. A block diagram of the HD-SDI receiver is shown in Figure 2.
The block diagram for the D-SDI receiver can be implemented in two different ways.
The integrated cable equalizer EQ and clock recovery unit (FPGA) together form the front-end receiver. For designers, the primary concern is typically chip compatibility. Notably, some semiconductor manufacturers—such as NS and GENNUM—offer three different rate equalizers (EQ) with identical pin configurations across their product lines. Moreover, these chips are backward-compatible: for instance, if a design currently supports 3G rates or HD-SDI, simply swapping to the appropriate EQ model eliminates the need for any hardware or PCB modifications. This approach significantly reduces R&D costs, while also enabling Solution One to easily cater to diverse customer needs by offering a wide variety of product options.
HD-SDI Receiver Implementation Solution No. 2
It integrates circuits such as the cable equalizer EQ and SERDES, serving as the front-end receiver. While this increases the cost of the FPGA's front-end components, the FPGA can still meet the requirements with its lower-cost options. The primary function of the receiver is to convert the SDI signal into 10-bit or 20-bit parallel data output.
The two solutions primarily differ in their receivers, and the specific choice at the receiving end should be determined after a comprehensive evaluation. Solution One requires some accumulated FPGA development experience, and its timeline can be unpredictable, but it’s easy to maintain and allows for flexible implementation of diverse product features. Solution Two, on the other hand, relies mostly on hardware chips for SDI conversion and processing, resulting in a shorter development cycle and enabling rapid time-to-market for your product.
Types of HD-SDI chips
In terms of security applications, achieving this transmission architecture relies primarily on several chips working together—beyond just coaxial cables (including those inside the receiving equipment) and BNC connectors. Specifically, the chip lineup introduced by TI (formerly National Semiconductor) includes components such as cable equalizers, cable drivers, reclockers, serializers, deserializers, video timing controllers, and other ICs designed for specialized control functions. This distinction highlights that, within the HD security SDI chip market, solutions can broadly be categorized into two main types: integrated designs, exemplified by companies like Semtech (via Gennum), and discrete implementations, represented by TI (formerly National Semiconductor). Additionally, there are also separate component offerings from companies such as EqcoLogic and Mindspeed.
As for another way to differentiate SDI chips—particularly noticeable in the security industry—it lies in the distinction between single-channel and multi-channel solutions, primarily referring to whether high-speed deserializers are integrated with 4-channel functionality. Currently, the only known solutions offering 4-channel integration, such as those from Lattice, Altera, and Xilinx, are mostly implemented using FPGAs. Even the innovative approach taken by South Korea’s SiliconGear, which combines an HD-level MUX with four deserializers into a single chip, still fundamentally relies on FPGA technology underneath. Meanwhile, true ASIC-based 4-in-1 solutions may emerge as the market becomes more stable and mature—and could eventually be introduced by established security chip manufacturers. Notably, equalizers, however, are not well-suited for multi-channel integration due to challenges like overly dense circuit routing and potential interference issues.
Additionally, SDI includes components such as the CableDriver and Equalizer, all of which incorporate mixed-signal technology. Before being acquired by Texas Instruments (TI), NS was already a well-known supplier of analog chips. As everyone knows, TI has long been a strong supporter in digital solutions—particularly in areas like DSPs and SoCs—and has played a pivotal role as an industry leader in providing master control chips for IP security cameras as well as DVR/NVR devices. The acquisition of NS not only strengthens TI’s overall analog chip capabilities but also holds significant implications specifically for the design of HD security systems.
Delving into the realm of SDI technology, the various methods leveraging IC semiconductors to achieve HD transmission have clearly taken on a diverse and multifaceted form. Of course, many discussions have centered around whether high-quality video signals like these could instead be transmitted via HDMI or DVI interfaces. However, defining such uncompressed high-definition solutions solely as HD-SDI would be inaccurate. From the perspective of signal format compatibility, ease of installation, and flexibility for system upgrades, the BNC connector—commonly used in SDI applications—provides significant advantages for surveillance systems. As a result, it has become widely adopted and is now actively promoted by the HDcctv Alliance as a standardized format.
HD-SDI Chip Solutions and Selection
The superior image quality of HD-SDI chips, combined with virtually negligible latency and excellent compatibility with existing analog systems, has caught the attention of several major chip manufacturers. Companies like Ambarella, TI, and HiSilicon have all entered the competitive HD-SDI chip market, meaning Gennum no longer dominates the field alone. This development is driving differentiated competition in HD-SDI chip solutions, both in terms of their architecture and cost structures.
The introduction of ISP solutions has also given SDI camera manufacturers more flexibility in choosing components, enabling them to better highlight their product differentiation. It’s important to note that our analysis of chips shouldn’t focus solely on individual components but should instead examine the overall chip solution—specifically, how the combination of components influences both the product’s form and its cost. Taking SDI cameras as an example, the chip, sensor, and ISP (DSP) all play a critical role in shaping the final product design and pricing. Currently, there are four main HD-SDI chip solutions available on the market.
1. CMOS image sensor + ISP + Encoder solution
The first solution uses a dedicated ISP processing chip and encoding, offering greater flexibility. While the dedicated ISP chip ensures high stability and guarantees excellent image quality, it does not deliver true HD @60fps as seen in VLDS systems.
2. CMOS image sensor + (ISP + CODEC) solution
The second solution uses an encoding chip with an integrated ISP. While this approach is less flexible than the first option, the integrated ISP processing chip offers high stability—but typically delivers average image quality and comes at a higher cost.
3. CMOS Image Sensor + FPGA Solution
The third approach uses chips like FPGAs to implement signal processing and encoding functions. While this solution offers the greatest flexibility, it suffers from poor stability, the highest cost, and challenges in ensuring consistent image quality.
4. CMOS Image Sensor + ISP + SDITx Solution
The fourth solution employs a dedicated ISP processing chip and an SDI transmission chip. This approach offers greater flexibility, with the specialized ISP chip providing excellent stability and ensuring superior image quality—capable of delivering high-definition video at 60 fps.
It is clear from this that each type of setup has its own advantages and disadvantages. Notably, superior image quality is a key highlight of HD-SDI—this is evident even in its chip architecture, where the ISP in HD-SDI is typically handled by a separate chip rather than being integrated into the CODEC itself.